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1. general description the 74LVC594A is an 8-bit serial-in/serial or parallel-out shift register with a storage register. separate clock and reset inputs are provided on both shift and storage registers. the input can be driven from either 3.3 v or 5 v devices. this feature allows the use of this device in a mixed 3.3 v and 5 v environment. this device is fully speci?ed for partial power-down applications using i off . the i off circuitry disables the output, preventing the damaging back?ow current through the device when it is powered down. the shift register has a serial input (ds) and a serial output (q7s) for cascading purposes. data is shifted on the positive-going transitions of the shcp input. the data in the shift register is transferred to the storage register on a positive-going transition of the stcp input. if both clocks are connected together, the shift register will always be one clock pulse ahead of the storage register. a low level on one of the two register reset pins ( shr and str) will clear the corresponding register. 2. features n 5 v tolerant inputs/outputs for interfacing with 5 v logic n wide supply voltage range from 1.2 v to 3.6 v n cmos low-power consumption n direct interface with ttl levels n balanced propagation delays n all inputs have schmitt-trigger action n complies with jedec standard jesd8-b/jesd36 n esd protection: u hbm jesd22-a114-d exceeds 2000 v u cdm jesd22-c101-c exceeds 1000 v n speci?ed from - 40 c to +85 c and - 40 c to +125 c. 3. applications n serial-to-parallel data conversion n remote control holding register 74LVC594A 8-bit shift register with output register rev. 01 24 may 2007 product data sheet
74LVC594A_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 24 may 2007 2 of 19 nxp semiconductors 74LVC594A 8-bit shift register with output register 4. ordering information 5. functional diagram table 1. ordering information type number package temperature range name description version 74LVC594Ad - 40 c to +125 c so16 plastic small outline package; 16 leads; body width 3.9 mm sot109-1 74LVC594Apw - 40 c to +125 c tssop16 plastic thin shrink small outline package; 16 leads; body width 4.4 mm sot403-1 74LVC594Abq - 40 c to +125 c dhvqfn16 plastic dual in-line compatible thermal enhanced very thin quad ?at package; no leads; 16 terminals; body 2.5 3.5 0.85 mm sot763-1 fig 1. logic symbol fig 2. functional diagram mbc319 stcp shcp str shr ds q7s q0 q1 q2 q3 q4 q5 q6 q7 14 10 13 11 12 15 9 1 2 3 4 5 6 7 mbc320 q7 q0 q1 q2 q3 q4 q5 q6 ds shcp shr stcp str 14 10 13 11 12 15 9 1234567 8-stage shift register 8-bit storage register q7s
74LVC594A_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 24 may 2007 3 of 19 nxp semiconductors 74LVC594A 8-bit shift register with output register fig 3. logic diagram mbc321 q0 q1 q2 q3 q4 q5 q6 ds shcp shr stcp str d q cp ffsh 0 r stage 0 d q cp ffst 0 r stages 1 to 6 dq q7 dq cp ffsh 7 r stage 7 d q cp ffst 7 r q7s fig 4. timing diagram mbc323 q7s q0 str shr stcp ds shcp q1 q6 q7
74LVC594A_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 24 may 2007 4 of 19 nxp semiconductors 74LVC594A 8-bit shift register with output register 6. pinning information 6.1 pinning 6.2 pin description fig 5. pin con?guration so16 and tssop16 fig 6. pin con?guration dhvqfn16 74LVC594A q1 v cc q2 q0 q3 ds q4 str q5 stcp q6 shcp q7 shr gnd q7s 001aag287 1 2 3 4 5 6 7 8 10 9 12 11 14 13 16 15 001aag288 74LVC594A q7 shr q6 shcp q5 stcp q4 str q3 ds q2 q0 gnd q7s q1 v cc transparent top view 7 10 6 11 5 12 4 13 3 14 2 15 8 9 1 16 terminal 1 index area table 2. pin description symbol pin description q[0:7] 15, 1, 2, 3, 4, 5, 6, 7 parallel data output gnd 8 ground (0 v) q7s 9 serial data output shr 10 shift register reset (active low) shcp 11 shift register clock input stcp 12 storage register clock input str 13 storage register reset (active low) ds 14 serial data input v cc 16 supply voltage
74LVC594A_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 24 may 2007 5 of 19 nxp semiconductors 74LVC594A 8-bit shift register with output register 7. functional description [1] h = high voltage state; l = low voltage state; - = low-to-high transition; x = dont care; nc = no change; 8. limiting values [1] the input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] for so16 packages: above 70 c the value of p tot derates linearly with 8 mw/k. for tssop16 packages: above 60 c the value of p tot derates linearly with 5.5 mw/k. for dhvqfn16 packages: above 60 c the value of p tot derates linearly with 4.5 mw/k. table 3. function table [1] input output function shcp stcp shr str ds q7s qn x x l x x l nc a low-state on shr only affects the shift register x x x l x nc l a low-state on str only affects the storage register x - l h x l l empty shift register loaded into storage register - x h x h q6s nc logic high level shifted into shift register stage 0. contents of all shift register stages shifted through, e.g. previous state of stage 6 (internal q6s) appears on the serial output (q7s). x - h h x nc qns contents of shift register stages (internal qns) are transferred to the storage register and parallel output stages -- h h x q6s qns contents of shift register shifted through; previous contents of the shift register is transferred to the storage register and the parallel output stages table 4. limiting values in accordance with the absolute maximum rating system (iec 60134). voltages are referenced to gnd (ground = 0 v). symbol parameter conditions min max unit v cc supply voltage - 0.5 +6.5 v i ik input clamping current v i <0 v - 50 - ma v i input voltage [1] - 0.5 +6.5 v i ok output clamping current v o >v cc or v o <0 v - 50 ma v o output voltage 3-state [1] - 0.5 6.5 v output high or low state [1] - 0.5 v cc + 0.5 v i o output current v o =0 vtov cc - 50 ma i cc supply current - 100 ma i gnd ground current - 100 - ma t stg storage temperature - 65 +150 c p tot total power dissipation t amb = - 40 c to +125 c [2] - 500 mw
74LVC594A_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 24 may 2007 6 of 19 nxp semiconductors 74LVC594A 8-bit shift register with output register 9. recommended operating conditions 10. static characteristics table 5. recommended operating conditions symbol parameter conditions min typ max unit v cc supply voltage 1.65 - 3.6 v functional 1.2 - - v v i input voltage 0 - 5.5 v v o output voltage 3-state 0 - 5.5 v output high or low state 0 - v cc v t amb ambient temperature - 40 - +125 c d t/ d v input transition rise and fall rate v cc = 1.65 v to 2.7 v - - 20 ns/v v cc = 2.7 v to 3.6 v - - 10 ns/v table 6. static characteristics at recommended operating conditions. voltages are referenced to gnd (ground = 0 v). symbol parameter conditions - 40 c to +85 c - 40 c to +125 c unit min typ [1] max min max v ih high-level input voltage v cc = 1.2 v 1.08 - - 1.08 - v v cc = 1.65 v to 1.95 v 0.65 v cc - - 0.65 v cc -v v cc = 2.3 v to 2.7 v 1.7 - - 1.7 - v v cc = 2.7 v to 3.6 v 2.0 - - 2.0 - v v il low-level input voltage v cc = 1.2 v - - 0.12 - 0.12 v v cc = 1.65 v to 1.95 v - - 0.35 v cc - 0.35 v cc v v cc = 2.3 v to 2.7 v - - 0.7 - 0.7 v v cc = 2.7 v to 3.6 v - - 0.8 - 0.8 v v oh high-level output voltage v i =v ih or v il i o = - 100 m a; v cc = 1.65 v to 3.6 v v cc - 0.2 - - v cc - 0.3 - v i o = - 4 ma; v cc = 1.65 v 1.2 - - 1.05 - v i o = - 8 ma; v cc = 2.3 v 1.8 - - 1.65 - v i o = - 12 ma; v cc = 2.7 v 2.2 - - 2.05 - v i o = - 18 ma; v cc = 3.0 v 2.4 - - 2.25 - v i o = - 24 ma; v cc = 3.0 v 2.2 - - 2.0 - v v ol low-level output voltage v i =v ih or v il i o = 100 m a; v cc = 1.65 v to 3.6 v - - 0.2 - 0.3 v i o = 4 ma; v cc = 1.65 v - - 0.45 - 0.65 v i o = 8 ma; v cc = 2.3 v - - 0.6 - 0.8 v i o = 12 ma; v cc = 2.7 v - - 0.4 - 0.6 v i o = 24 ma; v cc = 3.0 v - - 0.55 - 0.8 v i i input leakage current v cc = 3.6 v; v i = 5.5 v or gnd - 0.1 5- 20 m a
74LVC594A_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 24 may 2007 7 of 19 nxp semiconductors 74LVC594A 8-bit shift register with output register [1] all typical values are measured at v cc = 3.3 v (unless stated otherwise) and t amb =25 c. 11. dynamic characteristics i off power-off leakage current v cc = 0 v; v i or v o = 5.5 v - 0.1 10 - 20 m a i cc supply current v cc = 3.6 v; v i =v cc or gnd; i o =0a - 0.1 10 - 40 m a d i cc additional supply current per input pin; v cc = 1.65 v to 3.6 v; v i =v cc - 0.6 v; i o =0a - 5 500 - 5000 m a c i input capacitance v cc = 0 v to 3.6 v; v i = gnd to v cc - 5.0 - - - pf table 6. static characteristics continued at recommended operating conditions. voltages are referenced to gnd (ground = 0 v). symbol parameter conditions - 40 c to +85 c - 40 c to +125 c unit min typ [1] max min max table 7. dynamic characteristics voltages are referenced to gnd (groun d = 0 v). for test circuit see figure 13 . symbol parameter conditions - 40 c to +85 c - 40 c to +125 c unit min typ [1] max min max t pd propagation delay shcp to q7s; see figure 7 [2] v cc = 1.2 v - 17.5 - - - ns v cc = 1.65 v to 1.95 v 2.0 5.2 15.8 2.0 18.2 ns v cc = 2.3 v to 2.7 v 1.5 3.2 8.1 1.5 9.3 ns v cc = 2.7 v 1.5 3.5 7.6 1.5 8.7 ns v cc = 3.0 v to 3.6 v 1.5 3.1 6.7 1.5 7.7 ns stcp to qn; see figure 8 [2] v cc = 1.2 v - 19.3 - - - ns v cc = 1.65 v to 1.95 v 2.0 7.6 15.8 2.0 18.2 ns v cc = 2.3 v to 2.7 v 1.5 4.8 8.1 1.5 9.3 ns v cc = 2.7 v 1.5 5.2 7.6 1.5 8.7 ns v cc = 3.0 v to 3.6 v 1.2 4.5 6.7 1.2 7.7 ns
74LVC594A_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 24 may 2007 8 of 19 nxp semiconductors 74LVC594A 8-bit shift register with output register t phl high to low propagation delay shr to q7s; see figure 11 v cc = 1.2 v - 12.0 - - - ns v cc = 1.65 v to 1.95 v 2.0 5.0 15.8 2.0 18.2 ns v cc = 2.3 v to 2.7 v 1.5 3.8 8.1 1.5 9.3 ns v cc = 2.7 v 1.2 3.9 7.6 1.2 8.7 ns v cc = 3.0 v to 3.6 v 1.2 3.3 6.7 1.2 7.7 ns str to qn; see figure 12 v cc = 1.2 v - 20.0 - - - ns v cc = 1.65 v to 1.95 v 2.0 7.7 15.8 2.0 18.2 ns v cc = 2.3 v to 2.7 v 1.5 5.0 8.1 1.5 9.3 ns v cc = 2.7 v 1.2 5.3 7.6 1.2 8.7 ns v cc = 3.0 v to 3.6 v 1.2 4.4 6.7 1.2 7.7 ns t w pulse width shcp, stcp high or low; see figure 7 and figure 8 v cc = 1.65 v to 1.95 v 6.0 2.5 - 7.0 - ns v cc = 2.3 v to 2.7 v 5.0 2.0 - 5.5 - ns v cc = 2.7 v 4.5 1.5 - 5.0 - ns v cc = 3.0 v to 3.6 v 4.0 1.5 - 4.5 - ns shr, str low; see figure 11 and figure 12 v cc = 1.65 v to 1.95 v 6.0 2.5 - 5.5 - ns v cc = 2.3 v to 2.7 v 4.0 2.0 - 4.5 - ns v cc = 2.7 v 2.5 1.5 - 3.0 - ns v cc = 3.0 v to 3.6 v 2.5 1.5 - 3.0 - ns t su set-up time ds to shcp; see figure 9 v cc = 1.65 v to 1.95 v 5.0 1.0 - 5.5 - ns v cc = 2.3 v to 2.7 v 4.0 0.8 - 4.5 - ns v cc = 2.7 v 2.0 0.6 - 2.5 - ns v cc = 3.0 v to 3.6 v 2.0 0.6 - 2.5 - ns shr to stcp; see figure 10 v cc = 1.65 v to 1.95 v 8.0 3.5 - 8.5 - ns v cc = 2.3 v to 2.7 v 5.0 2.1 - 5.5 - ns v cc = 2.7 v 4.0 1.8 - 4.5 - ns v cc = 3.0 v to 3.6 v 4.0 1.7 - 4.5 - ns shcp to stcp; see figure 8 v cc = 1.65 v to 1.95 v 8.0 3.5 - 8.5 - ns v cc = 2.3 v to 2.7 v 5.0 2.1 - 5.5 - ns v cc = 2.7 v 4.0 1.8 - 4.5 - ns v cc = 3.0 v to 3.6 v 4.0 1.7 - 4.5 - ns table 7. dynamic characteristics continued voltages are referenced to gnd (groun d = 0 v). for test circuit see figure 13 . symbol parameter conditions - 40 c to +85 c - 40 c to +125 c unit min typ [1] max min max
74LVC594A_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 24 may 2007 9 of 19 nxp semiconductors 74LVC594A 8-bit shift register with output register [1] typical values are measured at t amb =25 c and v cc = 1.8 v, 2.5 v, 2.7 v, and 3.3 v respectively. [2] t pd is the same as t plh and t phl . [3] skew between any two outputs of the same package switching in the same direction. this parameter is guaranteed by design. [4] c pd is used to determine the dynamic power dissipation (p d in m w). p d =c pd v cc 2 f i n+ ? (c l v cc 2 f o ) where: f i = input frequency in mhz; f o = output frequency in mhz; c l = output load capacitance in pf; v cc = supply voltage in v; n = number of inputs switching; ? (c l v cc 2 f o ) = sum of outputs. t h hold time ds to shcp; see figure 9 v cc = 1.65 v to 1.95 v 1.5 0.2 - 2.0 - ns v cc = 2.3 v to 2.7 v 1.5 0.1 - 2.0 - ns v cc = 2.7 v 1.5 - 0.1 - 2.0 - ns v cc = 3.0 v to 3.6 v 1.0 - 0.2 - 1.5 - ns t rec recovery time shr to shcp, str to stcp; see figure 11 and figure 12 v cc = 1.65 v to 1.95 v 5.0 - 2.7 - 5.5 - ns v cc = 2.3 v to 2.7 v 4.0 - 1.5 - 4.5 - ns v cc = 2.7 v 2.0 - 1.0 - 2.5 - ns v cc = 3.0 v to 3.6 v 2.0 - 1.0 - 2.5 - ns f max maximum frequency shcp or stcp; see figure 7 and figure 8 v cc = 1.65 v to 1.95 v 80 130 - 70 - mhz v cc = 2.3 v to 2.7 v 100 140 - 90 - mhz v cc = 2.7 v 110 150 - 100 - mhz v cc = 3.0 v to 3.6 v 130 180 - 115 - mhz t sk(o) output skew time v cc = 3.0 v to 3.6 v [3] - - 1.0 - 1.5 ns c pd power dissipation capacitance v i = gnd to v cc [4] v cc = 1.65 v to 1.95 v - 50 - - - pf v cc = 2.3 v to 2.7 v - 45 - - - pf v cc = 3.0 v to 3.6 v - 44 - - - pf table 7. dynamic characteristics continued voltages are referenced to gnd (groun d = 0 v). for test circuit see figure 13 . symbol parameter conditions - 40 c to +85 c - 40 c to +125 c unit min typ [1] max min max
74LVC594A_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 24 may 2007 10 of 19 nxp semiconductors 74LVC594A 8-bit shift register with output register 12. waveforms measurement points are given in t ab le 8 . v ol and v oh are typical output voltage drops that occur with the output load. fig 7. the shift clock (shcp) to serial data output (q7s) propagation delays, the shift clock pulse width and maximum shift clock frequency mna557 sh cp input q 7 s output t plh t phl t w 1/f max v m v oh v i gnd v ol v m measurement points are given in t ab le 8 . v ol and v oh are typical output voltage drops that occur with the output load. fig 8. the storage clock (stcp) to parallel data output (qn) propagation delays, the storage clock pulse width and the shift clock to storage clock set-up time mna558 st cp input q n output t plh t phl t w t su 1/f max v m v oh v i gnd v ol v m sh cp input v i gnd v m
74LVC594A_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 24 may 2007 11 of 19 nxp semiconductors 74LVC594A 8-bit shift register with output register measurement points are given in t ab le 8 . the shaded areas indicate when the input is permitted to change for predictable output performance. v ol and v oh are typical output voltage drops that occur with the output load. fig 9. the data set-up and hold times for the serial data input (ds) mna560 gnd gnd t h t su t h t su v m v m v m v i v oh v ol v i q 7 s output sh cp input d s input measurement points are given in t ab le 8 . v ol and v oh are typical output voltage drops that occur with the output load. fig 10. the shift reset ( shr) to storage clock (stcp) set-up times mbc326 v m t su v m v m stcp input q n outputs shr input
74LVC594A_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 24 may 2007 12 of 19 nxp semiconductors 74LVC594A 8-bit shift register with output register measurement points are given in t ab le 8 . v ol and v oh are typical output voltage drops that occur with the output load. fig 11. the shift reset ( shr) pulse width, the shift reset to serial data output (q7s) propagation delays and the shift reset to shift clock (shcp) recovery time mbc324 v m t phl v m t rec t w v m shcp input q7s output shr input measurement points are given in t ab le 8 . v ol and v oh are typical output voltage drops that occur with the output load. fig 12. the storage reset ( str) pulse width, the storage reset to parallel data output (qn) propagation delays and the storage reset to storage clock (stcp) recovery time mbc325 v m t phl v m t rec t w v m stcp input q n outputs str input table 8. measurement points supply voltage input output v cc v m v m v cc < 2.7 v 0.5 v cc 0.5 v cc v cc 3 2.7 v 1.5 v 1.5 v
74LVC594A_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 24 may 2007 13 of 19 nxp semiconductors 74LVC594A 8-bit shift register with output register test data is given in t ab le 9 . de?nitions for test circuit: r l = load resistance. c l = load capacitance including jig and probe capacitance. r t = termination resistance should be equal to output impedance z o of the pulse generator. v ext = external voltage for measuring switching times. fig 13. load circuitry for switching times v m v m t w t w 10 % 90 % 0 v v i v i negative pulse positive pulse 0 v v m v m 90 % 10 % t f t r t r t f 001aae331 v ext v cc v i v o dut c l r t r l r l pulse generator table 9. test data supply voltage input load v ext v i t r , t f c l r l t plh , t phl t plz , t pzl t phz , t pzh 1.2 v v cc 2 ns 30 pf 1 k w open 2 v cc gnd 1.65 v to 1.95 v v cc 2 ns 30 pf 1 k w open 2 v cc gnd 2.3 v to 2.7 v v cc 2 ns 30 pf 500 w open 2 v cc gnd 2.7 v 2.7 v 2.5 ns 50 pf 500 w open 2 v cc gnd 3.0 v to 3.6 v 2.7 v 2.5 ns 50 pf 500 w open 2 v cc gnd
74LVC594A_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 24 may 2007 14 of 19 nxp semiconductors 74LVC594A 8-bit shift register with output register 13. package outline fig 14. package outline sot109-1 (so16) x w m q a a 1 a 2 b p d h e l p q detail x e z e c l v m a (a ) 3 a 8 9 1 16 y pin 1 index unit a max. a 1 a 2 a 3 b p cd (1) e (1) (1) eh e ll p qz y w v q references outline version european projection issue date iec jedec jeita mm inches 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 10.0 9.8 4.0 3.8 1.27 6.2 5.8 0.7 0.6 0.7 0.3 8 0 o o 0.25 0.1 dimensions (inch dimensions are derived from the original mm dimensions) note 1. plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. 1.0 0.4 sot109-1 99-12-27 03-02-19 076e07 ms-012 0.069 0.010 0.004 0.057 0.049 0.01 0.019 0.014 0.0100 0.0075 0.39 0.38 0.16 0.15 0.05 1.05 0.041 0.244 0.228 0.028 0.020 0.028 0.012 0.01 0.25 0.01 0.004 0.039 0.016 0 2.5 5 mm scale so16: plastic small outline package; 16 leads; body width 3.9 mm sot109-1
74LVC594A_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 24 may 2007 15 of 19 nxp semiconductors 74LVC594A 8-bit shift register with output register fig 15. package outline sot403-1 (tssop16) unit a 1 a 2 a 3 b p cd (1) e (2) (1) eh e ll p qz y w v q references outline version european projection issue date iec jedec jeita mm 0.15 0.05 0.95 0.80 0.30 0.19 0.2 0.1 5.1 4.9 4.5 4.3 0.65 6.6 6.2 0.4 0.3 0.40 0.06 8 0 o o 0.13 0.1 0.2 1 dimensions (mm are the original dimensions) notes 1. plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. plastic interlead protrusions of 0.25 mm maximum per side are not included. 0.75 0.50 sot403-1 mo-153 99-12-27 03-02-18 w m b p d z e 0.25 18 16 9 q a a 1 a 2 l p q detail x l (a ) 3 h e e c v m a x a y 0 2.5 5 mm scale tssop16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm sot403-1 a max. 1.1 pin 1 index
74LVC594A_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 24 may 2007 16 of 19 nxp semiconductors 74LVC594A 8-bit shift register with output register fig 16. package outline sot763-1 (dhvqfn16) terminal 1 index area 0.5 1 a 1 e h b unit y e 0.2 c references outline version european projection issue date iec jedec jeita mm 3.6 3.4 d h 2.15 1.85 y 1 2.6 2.4 1.15 0.85 e 1 2.5 0.30 0.18 0.05 0.00 0.05 0.1 dimensions (mm are the original dimensions) sot763-1 mo-241 - - - - - - 0.5 0.3 l 0.1 v 0.05 w 0 2.5 5 mm scale sot763-1 dhvqfn16: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 16 terminals; body 2.5 x 3.5 x 0.85 mm a (1) max. a a 1 c detail x y y 1 c e l e h d h e e 1 b 27 15 10 9 8 1 16 x d e c b a terminal 1 index area a c c b v m w m e (1) note 1. plastic or metal protrusions of 0.075 mm maximum per side are not included. d (1) 02-10-17 03-01-27
74LVC594A_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 24 may 2007 17 of 19 nxp semiconductors 74LVC594A 8-bit shift register with output register 14. abbreviations 15. revision history table 10. abbreviations acronym description cdm charged device model cmos complementary metal oxide semiconductor dut device under test esd electrostatic discharge hbm human body model ttl transistor-transistor logic table 11. revision history document id release date data sheet status change notice supersedes 74LVC594A_1 20070524 product data sheet - -
74LVC594A_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 24 may 2007 18 of 19 nxp semiconductors 74LVC594A 8-bit shift register with output register 16. legal information 16.1 data sheet status [1] please consult the most recently issued document before initiating or completing a design. [2] the term short data sheet is explained in section de?nitions. [3] the product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple dev ices. the latest product status information is available on the internet at url http://www .nxp .com . 16.2 de?nitions draft the document is a draft version only. the content is still under internal review and subject to formal approval, which may result in modi?cations or additions. nxp semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. short data sheet a short data sheet is an extract from a full data sheet with the same product type number(s) and title. a short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. for detailed and full information see the relevant full data sheet, which is available on request via the local nxp semiconductors sales of?ce. in case of any inconsistency or con?ict with the short data sheet, the full data sheet shall prevail. 16.3 disclaimers general information in this document is believed to be accurate and reliable. however, nxp semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. right to make changes nxp semiconductors reserves the right to make changes to information published in this document, including without limitation speci?cations and product descriptions, at any time and without notice. this document supersedes and replaces all information supplied prior to the publication hereof. suitability for use nxp semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of a nxp semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. nxp semiconductors accepts no liability for inclusion and/or use of nxp semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customers own risk. applications applications that are described herein for any of these products are for illustrative purposes only. nxp semiconductors makes no representation or warranty that such applications will be suitable for the speci?ed use without further testing or modi?cation. limiting values stress above one or more limiting values (as de?ned in the absolute maximum ratings system of iec 60134) may cause permanent damage to the device. limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the characteristics sections of this document is not implied. exposure to limiting values for extended periods may affect device reliability. terms and conditions of sale nxp semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www .nxp .com/pro? le/ter ms , including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by nxp semiconductors. in case of any inconsistency or con?ict between information in this document and such terms and conditions, the latter will prevail. no offer to sell or license nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 16.4 trademarks notice: all referenced brands, product names, service names and trademarks are the property of their respective owners. 17. contact information for additional information, please visit: http://www .nxp.com for sales of?ce addresses, send an email to: salesad dresses@nxp.com document status [1] [2] product status [3] de?nition objective [short] data sheet development this document contains data from the objective speci?cation for product development. preliminary [short] data sheet quali?cation this document contains data from the preliminary speci?cation. product [short] data sheet production this document contains the product speci?cation.
nxp semiconductors 74LVC594A 8-bit shift register with output register ? nxp b.v. 2007. all rights reserved. for more information, please visit: http://www.nxp.com for sales office addresses, please send an email to: salesaddresses@nxp.com date of release: 24 may 2007 document identifier: 74LVC594A_1 please be aware that important notices concerning this document and the product(s) described herein, have been included in section legal information. 18. contents 1 general description . . . . . . . . . . . . . . . . . . . . . . 1 2 features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 4 ordering information . . . . . . . . . . . . . . . . . . . . . 2 5 functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 6 pinning information . . . . . . . . . . . . . . . . . . . . . . 4 6.1 pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 6.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 7 functional description . . . . . . . . . . . . . . . . . . . 5 8 limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5 9 recommended operating conditions. . . . . . . . 6 10 static characteristics. . . . . . . . . . . . . . . . . . . . . 6 11 dynamic characteristics . . . . . . . . . . . . . . . . . . 7 12 waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 13 package outline . . . . . . . . . . . . . . . . . . . . . . . . 14 14 abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 17 15 revision history . . . . . . . . . . . . . . . . . . . . . . . . 17 16 legal information. . . . . . . . . . . . . . . . . . . . . . . 18 16.1 data sheet status . . . . . . . . . . . . . . . . . . . . . . 18 16.2 de?nitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 16.3 disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 16.4 trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 17 contact information. . . . . . . . . . . . . . . . . . . . . 18 18 contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

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